Synchronous buck converter frequency
More importantly, they are not capable of revealing or predicting the influence of variations in device structures or circuit operating conditions on each of the individual power loss terms. This is the essential knowledge required for developing future generation power MOSFETs for high-efficiency and high-density buck converters.
The purpose of this paper is to comprehensively investigate the performance perspectives and theoretical limitations of trench power MOSFET technology in synchronous rectifier buck converters over a wide range of operating conditions [ 16 ].
Device measurement data was also used to validate the physical device models. Although the efficiency of a buck converter is usually determined by directly measuring its input and output power, such an experimental approach proves very difficult to employ to characterize the individual power loss terms of the control and sync FETs in the converter.
The limited sampling rate of digital oscilloscopes often introduces some measurement errors as well. The previous work on power MOSFET performance analysis used simple analytical device models to calculate , , and other device parameters, and a set of simple analytical equations for power loss calculation [ 4 , 8 , 11 , 13 ].
While these approaches provide a quick first-order estimation of converter efficiency, its accuracy is inevitably limited by the approximation and simplification made in the analytical models. Recently, Cavallaro et al. Furthermore, detailed information on various power loss contributions of the CtrlFETs and SyncFETs over a wide range of operating conditions can be easily obtained from the mixed-mode simulation.
Figure 1 depicts the concept of this approach. It can be used to predict the electrical characteristics of arbitrary two- or three-dimensional semiconductor structures under user-specified operating conditions. It also offers SPICE-like circuit simulation capability combined with device numerical modeling capability, and provides a quick and inexpensive way of evaluating and optimizing circuit and device concepts.
Reasonable agreement is observed. An ratio of 4. The issue of optimizing this ratio is to be discussed in Section 5. The power losses introduced by the passive components contribute to this efficiency difference. The simulation results show the same trend as the measurend results in all load current range even with the difference due to the passive parasitics.
The mix-mode simulation also allows us to analyze individual power loss contributions of both SyncFET and CtrlFET in addition to converter overall efficiency. We also compare the relative contribution of each power loss term at the switching of 0. The following are observed. II Conduction losses remain constant independent of switching frequency, and count for a small percentage of the total power loss in the MHz frequency range. For the switching frequency of 0.
For lower-frequency range, the SyncFET die size increase introduces subtle efficiency increase, which is very cost-consuming. For example, at 0. Figure 10 illustrates the individual loss terms at different frequencies, which helps to explain the above observations. The switching losses dominate at MHz frequency range, which increases when the switching frequency increases.
As the die size increases, the conduction loss decrease is easily overshadowed by the increase of switching losses. This effect is even more significant for the CtrlFET die sizing. In this specfic case, for a fixed die size of 2. The die size of 9. For a fixed die size of 9. The increase in die size beyond 3. Furthermore, as shown in Figures 8 and 9 , an optimum range instead of a single maximum point of MOSFET die size exists to offer a maximum converter efficiency.
A number of structural variations of the trench power MOSFET technology have been developed or proposed in the past decade as shown in Figure Note that some of these device concepts are still in research stage instead of full-scale production. Figure 11 a shows a trench MOSFET structure with a thick oxide layer at the bottom of the trench to minimize [ 3 , 18 ].
Figure 11 b shows a trench MOSFET cell with an ultranarrow trench width to minimize by reducing the effective gate-drain overlap area [ 2 ]. Figure 11 c illustrates a trench MOSFET structure with a floating poly shield below the gate polysilicon trench refill [ 19 ]. In order to obtain a reasonable comparison between different technologies, the above structures have the same pitch size as the basic trench power MOSFET. Table 2 lists the major device parameters of all SyncFETs being scaled to have the same of 9.
To obtain this requirement, different die sizes are used for different technologies as shown in Table 2. The thick bottom oxide Type B achieves the highest FOM, which effectively reduce the specific with only a subtle specific penelty.
It can be predicted that Type F has the worst performance among all these technologies. Figure 12 compares the full load converter efficiency among the six MOSFET technologies at various switching frequencies. As we predicted, the low-density chip set provides worst efficiency performance over the whole frequency range.
The thick bottom chip set offers the best performance in MHz frequency range. The conduction losses of both CtrlFET and SyncFET are almost the same as they have the same while there is a large difference in the switching losses due to the difference in the and parameters. It is well known that a smaller provides faster switching speed.
Smaller also offers smaller gate-driver power loss. This is also observed in Figure The low-density chip set requires much larger gate-driver power losses.
At even higher frequencies, the gate-driver power requirement will be a major problem. Smaller will definitely be required. As shown in Figure 13 , the body-diode loss of the thick bottom SyncFET is lower than its low-density counterpart.
Larger of the low-density MOSFET introduces larger reverse recovery loss, and its larger introduces larger switching loss as shown in Figure It should be noted that smaller may not always lead to overall performance improvement of the buck converter.
Under certain circumstances, the reduction of gate charge of the MOSFET becomes counter-productive, and leads to higher switching power losses. As the switching frequency of buck converters increases to the MHz range to facilitate better converter transient response and smaller passive components, it is, however, not clear how close the FOM correlates to the overall converter efficiency, or whether or not a different FOM needs to be defined.
FOM seems to correlate well with the converter efficiency even in the MHz operating frequency range. In this paper, we have comprehensively investigated the performance perspectives and theoretical limitations of trench power MOSFETs in synchronous rectifier buck converters over a wide range of operating conditions.
It is observed that going from 0. For different trench technologies, the technology provides the lowest provides smallest gate-driver losses and the smallest CtrlFET turning-off losses. Basically, there is a tradeoff between faster switching transition and smaller reverse recovery loss. The technology, which has lowest , theoretically provides the best reverse recovery loss under the same CtrlFET current slew rate.
The simulation results show that this FOM still correlates well to the overall converter efficiency. This work was supported in part by the U. This is an open access article distributed under the Creative Commons Attribution License , which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Article of the Year Award: Outstanding research contributions of , as selected by our Chief Editors.
Read the winning articles. Academic Editor: Peter Barbosa. Received 03 Jan Accepted 07 Mar The application average current will determine the average heat in switching MOSFETs which is related to conduction losses and switching losses. Switching losses are mostly related to the current, the input voltage and the switching frequency. The application total power losses can be derived from the datasheet efficiency curve:.
The IC maximum allowed power dissipation depends on the IC package, the layout and the application maximum ambient temperature. Layouts with more copper connected to IC pins and package thermal pad can be helpful dissipate more power. The application maximum current can normally be at the same level as the device rated current as mentioned in the datasheet, sometimes even a bit higher. The designer should make sure that the over-current protection OCP is never triggered during maximum application load current.
For supply rails that need to be active in low power standby modes, it is desirable to make the Buck converter efficiency at light load as high as possible. The high switching frequency at light load will mean that the majority of losses at light load will be caused by switching losses. The operation principle is as following: When the load reduces, the inductor current valley reaches zero current at a certain point. The minimum ON time of the high-side MOSFET determines the inductor peak current and average inductor current can only be reduced by reducing the switching frequency; i.
Voltage regulation in PSM is accomplished by comparing the output voltage ripple valley with the internal reference. PSM will reduce the converter switching frequency to very low values at light load; down to a few kHz. This reduces switching losses, thereby increasing the light load efficiency considerably.
Some loads may be sensitive to this. This transition will result in larger output voltage undershoots compared to converters that always run in force-PWM mode. If the application does not need enhanced light load efficiency, it is better to select Force-PWM parts, which will provide stable operation conditions over the full load range. The switching frequency of Buck converters is important parameter to consider.
Higher switching frequency makes it possible to use smaller inductor and capacitors, and improves the step load behaviour of the converter. However, it also increases switching losses and extends the EMI radiation frequency range. Higher switching frequency can also limit the maximum step-down ratio that can be achieved: The minimum duty-cycle is limited by the converter minimum ON time and the frequency:.
Figure 6. Buck converter switching frequency influence on ripple, transient response and efficiency. Each topology has its advantages and drawbacks, so when selecting a Buck converter for an application, it is good to understand the characteristics of each topology. Current Mode converters have an internal clock generator, an error amplifier and current sense. The start of a new switching cycle is determined by the clock signal, so the system runs in fixed switching frequency.
If the application load current is relatively steady, you can use current mode Buck converters. If the system is susceptible to noise at certain frequencies, you also may want to use a current mode Buck converter, and maybe synchronize it to an external clock signal to set the switching frequency very precisely.
CMCOT converters also contain a current sense and error amplifier, but now the falling slope of the current is compared to the output of the error amplifier. The fact that the system does not need to wait for a next clock-cycle makes it possible to react more quickly to sudden step loads; as soon as the output voltage drops and the error amplifier voltage rises above the falling current slope, a new ON time is triggered and the inductor converter current rises again.
If the application load has moderate transient load conditions, you may want to choose a CMCOT topology Buck converter, to reduce output voltage fluctuation during load transients. CMCOT also is less sensitive to noise in low duty-cycle applications.
CMCOT converter switching frequency will show some deviation during load transients. When the feedback signal falls below the reference, a new fixed ON time is generated and inductor current rises. If the output voltage has not recovered, another ON time is generated after a short blanking period until the inductor current matches the load current and output voltage is at its nominal level again.
These are summed and then compared with an internal reference. When this summed voltage drops below the reference, the comparator triggers the ON time generator. A sudden drop in output voltage will immediately result in a new ON time, and the converter can generate successive ON times as long as the output voltage has not recovered.
This makes the ACOT topology reaction speed to load transients extremely fast. A special frequency locked loop system will slowly adjust the ON time to regulate the average switching frequency to a defined value. If the application load shows severe fast load transients like seen in Core and DDR rails it is best to choose ACOT Buck converters, which can improve load transient behavior by a factor 2 to 4, and make it possible to use smaller output capacitors.
They are especially suitable for low duty-cycle applications. Due to their very small minimum ON time, ACOT Buck converters with high switching frequencies can be used in applications with large step-down ratios. ACOT converter switching frequency can show considerable deviation during load transients. But the absence of loop compensation and slope compensation and the extremely fast loop response makes ACOT designs simple, flexible and cost effective. All Richtek Buck converters have a soft-start function.
After enabling the converter, the duty-cycle is gradually increased to allow a smooth rising output voltage, which avoids inrush current due to sudden charging of the output capacitors. Converters with internal soft-start have a fixed soft-start time. If the application uses very large output capacitance or requires a specific soft-start time, it is better to select a converter with externally programmable soft-start; the soft-start time can be set by an external capacitor. Current mode converters need error amplifier compensation to ensure stable operation.
The type-II compensation components determine the converter bandwidth and the phase boost frequency. Converters with external compensation have more flexibility in setting the desired bandwidth and phase margin with different types of output capacitors over a wider range of input and output voltage conditions. Some converters have a programmable frequency function: The switching frequency can be set by means of an external resistor. This gives more flexibility in choosing the best switching frequency for the application; higher frequency to reduce ripple or component size or get better transient behavior, or lower frequency to improve efficiency or reduce higher harmonics.
Some current mode converters have an external sync input that allows the internal clock to be synchronized to an external clock signal. This makes it possible to set the switching frequency at a very precise value for avoiding noise at sensitive frequency bands , and also make it possible to run several converters at the same frequency.
Many current mode Buck converters from the LV series have Low Dropout mode function: When the input voltage drops, these Buck converters gradually increase the duty-cycle and will continuously switch-on the high side MOSFET when the input voltage drops below the regulated output voltage.
This function is especially suitable in battery powered applications, and can extend application operation time when the battery is almost depleted. The Power Good function will monitor the Buck converter output signal and provide a means of telling the system when the output voltage is within a certain operating range. Power Good can be used for system initialization, fault detection or start-up sequence. When the inductor current exceeds the OCP level, the converter duty-cycle is limited.
Further load increase will result in output voltage drop. However, there are different ways how the system behaves in overload condition:. The converter needs to be re-enabled or cycle the input voltage for restart.
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